Consider a 16M times 128 memory built by using 512K times 16

Consider a 16M times 128 memory built by using 512K times 16 memory chips. How many rows of memory chips are needed? 8 32 64 256  A 256 Mb DRAM chip is organized as a 32M times 8 memory externally and as a 16K times 16K array internally. Rows must be refreshed at least once every 50 ms to prevent data loss; refreshing a row takes 100 ns. What fraction of the total memory bandwidth is lost to refresh cycles? 3% 3.3% 33% 50% The average time required to reach a storage location in memory and obtain its contents is called___. Latency time Access time Turnaround time Response time

Solution

1. n=((16Mx128)/(512Kx16))=256

option D is the answer

4 option B is the answer (Access time)