I have question from FPGA class Thanks We wish to dispaly th

I have question from FPGA class, Thanks.

We wish to dispaly the hexadecimal value of an 8 bit number A on the two 7 segment dispalys HEX3-2. We also wish to dispaly the hex value of an 8 bit number B on the two 7 segment dispalys HEX1-0. The values of A and B are inputs to the circuit which are provide by means of switches SW7-0. To input the value of A and B, first set the switches to the desired value of A, store these switch values in a register, and then change the swithces to the desired value of B. Finally, use an adder to generate the arithmetics sum S=A+B, and display this sum on the 7 segment dispalys HEX5-4. Show the carry out produced by the adder on LEDR[0].

1. Create a new quartus II project which will be used to implement the desired circuit on your DE series board.

2.Write a Verilog file that provides the necessary functionality. Use KEY0 as an active low asynchronouse reset, and use KEY1 as a clock input.

3. Include the necessary pin assignments for the pushbutton switches and 7 segment displays, and then complile the circuit.

4.Download the circuit ontoyour DE series board and test its functionality.

Solution

1)
1) vlog my_counter.v

2) vlog my_counter_tb.v

3) vsim -t ps my_counter_tb

4) add wave *

5) run 1 us

2)