Design the triggering circuit of Figure Q3 below The paramet

Design the triggering circuit of Figure Q3 below. The parameters of the programmable unijunction transistor (PUT) are V_s = 35V, I_G = 1.5 mA. The frequency of oscillation f = 85 kHz. The pulse width tg = 40 mus, and the peak triggering pulse V_RR = 10 V.

Vp = 0.7V + Vg

VG=10-0.7=9.3V= ETA * VBB

HERE VBB =35 V

ETA=9.3/35 = R1/R1+R2 ...... EQN 1

F = 1/ (RC ln(1/(1-))............. WHERE RC=TG

CALULATE ETA FROM ABOVE ...GET ONE MORE EQN OF ETA AND GET R1 AND R2

Design the triggering circuit of Figure Q3 below. The parameters of the programmable unijunction transistor (PUT) are V_s = 35V, I_G = 1.5 mA. The frequency of

Design the triggering circuit of Figure Q3 below The paramet

Solution

Get Help Now

Submit a Take Down Notice