VERILOG Design a 2input 32bit multiplexor and a 2input 5bit

[VERILOG]

Design a 2-input 32-bit multiplexor and a 2-input 5-bit multiplexor. Use \"switch\" or \"if-then-else\" statement. Submit your verilog code and explain the waveform used for testing. (You can use \"assign\" statements within always block.)

The module must have the following format.

module Mux32Bit2To1(a, b, op, result);

input [31:0] a, b; // 32-bit inputs

input op; // one-bit selection input

output [31:0] result; // 32-bit output

module Mux5Bit2To1(a, b, op, result);

input [4:0] a, b; // 5-bit inputs

input op; // one-bit selection input

output [4:0] result; // 5-bit output

Solution

Mux32Bit2To1.v

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Mux5Bit2To1.v