module EE2169Lab7B Montanez sw load shift clk ld out input 3

module EE2169Lab7B Montanez (sw, load, shift, clk, ld, out) input [3:01 sw input switches SWO-SW3 inputload, input shift, input clk, output out, output 17:01 ld LED outputs regi7:01 shiftreg: Serial register outputs reg [3:01 Q: // load BTN3 /1 shift input SW7 // clock input from GPIO 29 or GPIOo 31 // Serial data output to GPIOO // Parallel load register outputs

Solution

module shiftreg(sw,load,shift,clk,ld,out);

input [3:0]sw;
input load,shift,clk;
output out;
output [7:0] ld;
reg [3:0] Q=4\'b0000;
reg [7:0] shiftrg=8\'b00000000;
always@(posedge clk)
begin
if(Load==1\'b1)
begin
Q<=SW;
end
else
begin
Q=Q;
out<=shiftrg[0];
shiftrg <= shiftrg>>shift;
end;
end
end
endmodule