I dont know how to do the VHDL code for this question Assume

I don\'t know how to do the VHDL code for this question:

Assume that you have a 16bit ripple carry adder, and a single port SRAM organized as 1024x16 with WE control input. Draw a block diagram of a system to add memory location 0 to memory location 1 and store the result in memory location 3, then add locations 4 and 5 and store in location 7, and so on throughout the memory until M(255) = M(252) + M(253).

M(4*i + 3) = M(4*i) + M(4*i+1) i = 0, 1, …, 63 The system should start this operation when a START line is asserted, and it should stop when the last result is written to M(255). Note that some memory locations are neither read nor written (e.g. locations 2, 6, …, 254).

Write a VHDL test bench for your design to verify the correct functionality. In order to simulate your design, you need to load your SRAM with data. The detail of this procedure will be given by your instructor.

Solution

The VHDL code of Carry look-ahead adder is written as:
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY c_l_addr IS
PORT
(
x_in : IN STD_LOGIC_VECTOR (N DOWNTO 0);
y_in : IN STD_LOGIC_VECTOR (N DOWNTO 0);
carry_in : IN STD_LOGIC;
sum : OUT STD_LOGIC_VECTOR(N DOWNTO 0);
carry_out : OUT STD_LOGIC
);
END c_l_addr;
ARCHITECTURE behavioral OF c_l_addr IS
SIGNAL h_sum : STD_LOGIC_VECTOR (N DOWNTO 0);
SIGNAL carry_generate : STD_LOGIC_VECTOR (N DOWNTO 0);
SIGNAL carry_propagate : STD_LOGIC_VECTOR (N DOWNTO 0);
SIGNAL carry_in_internal : STD_LOGIC_VECTOR(N DOWNTO 1);
BEGIN
h_sum <= x_in XOR y_in;
carry_generate <= x_in AND y_in;
carry_propagate <= x_in OR y_in;
PROCESS (carry_generate,carry_propagate,carry_in_internal)
BEGIN
carry_in_internal(1) <= carry_generate(0) OR (carry_propagate(0) AND carry_in);
inst: FOR i IN 1 TO (N-1) LOOP
carry_in_internal(i+1) <= carry_generate(i) OR (carry_propagate(i) AND carry_in_internal(i));
END LOOP;
carry_out <= carry_generate(N) OR (carry_propagate(N) AND carry_in_internal(N));
END PROCESS;
sum(0) <= h_sum(0) XOR carry_in;
sum(N DOWNTO