Using a 3bit up counter with PLoad implement the counting se

Using a 3-bit up counter with P-Load, implement the counting sequence: 3 1 2 0 7 5 6 4

Solution

The counter is loaded by applying the desired binary number to the inputs P₂, P₁ and P₀ and a LOW pulse is applied to the PARALLEL LOAD input, not(PL). This will asynchronously transfer P ₂, P₁ and P₀ into the flip-flops. This transfer occurs independently of the J, K, and CLK inputs. As long as not(PL) remains in the LOW state, the CLK input has no effect on the flip-flop. After not(PL) returns to high, the counter resumes counting, starting from the number that was loaded into the counter.

Step 2: Let the type of flip-flops be RS flip-flops.Step 1: Since it is a 3-bit up counter, the number of flip-flops required is three.

Step 3: Let the three flip-flops be A,B,C.

Step 4: The state table is as shown in Table 2.1.

Table 2.1: State table

Present state Next state

Step 5: The next step is to develop an excitation table from the state table, which is shown in Table 2.2.

Table 2.2 Exitation Table

Output State Transition Flip Flop Inputs

Present state Next State

Add logic to disable count logic for Load =1Add path for input data, enabled for Load = 1

disable feed back from output for Load =1

enable count logic for Load =0 & Count = 1

For the Parallel Load Counter