q1Explain the impact of transistors and transistor scaling o

q1)Explain the impact of transistors and transistor scaling on digital systems. Why are they so important? Do they have performance/power/energy implications? plz computer written needed

Solution

In the physical realization of digital system transistors are widely used. Due to low power dissipiation CMOS transistors are mainly used. In VLSI technology, packing density of transistors is as high as possible i.e small size of transistors are required..The size of transistor defines area on the chip and other parameters (power dissipiation, power density) also. The reduction of size (dimention) of MOSFET is called as \"Scaling\"

There are two basic types of size-reduction strategies: Full Scaling (also called constant-field scaling) and Constant Voltage Scaling. Each has unique effect and physical limitation also.

Full Scaling (constant-field scaling):

In this technique the magnitude of internal electric fields in the MOSFET is preserved, while the dimensions are scaled down by a factor of S. This goal is achieved by scaling down all potentials proportionally, by the same scaling factor. Thus charge densities are increased by a factor of S in order to maintain the field conditions. This scaling also affects the threshold voltage of transistor.

Some device characteristics after full scaling:

Quantity

Before Scaling

After Scaling

Oxide capacitance

Cox

Cox’ =S*Cox

Drain Current

Id

Id’ =Id/S

Power Dissipation

P

P’= P/S^2

Power Density

P/Area

(P’/Area’ )= (P/Area)

After Full Scaling-

-Reduction in Power dissipation.

-Power density per unit area remains unchanged for the scaled device.

-As Gate and Oxide Capacitance changes so the charging and discharging of this capacitance plays an important role in the transient operation of the MOSFET.

-Reduction of all dimensions on-chip will lead to a reduction of various parasitic capacitances and resistances and the overall performance improves.

-Limitation: Some times it is not possible to scale down power supply due to peripherals and other device connected in the circuit and external voltage-level constraints.

Constant Voltage Scaling:

In this, all dimensions of the MOSFET are reduced by a factor of S, as in full scaling. The power supply voltage and the terminal voltages remain unchanged. The doping densities must be increased by a factor of S^2 in order to preserve the charge-field relations.

Some device characteristics after Constant Voltage scaling:

Quantity

Before Scaling

After Scaling

Oxide capacitance

Cox

Cox’ =S*Cox

Drain Current

Id

Id’ =Id * S

Power Dissipation

P

P’= P * S

Power Density

P/Area

(P’/Area’ )= S^3 (P/Area)

Constant-voltage scaling may be preferred over full (constant-field) scaling in many practical cases because of the external voltage-level constraints. The constant-voltage scaling increases the drain current density and the power density by a factor of S^3. This large increase in current and power densities may eventually cause serious reliability problems for the scaled transistor, such as electromigration, hot-carrier degradation, oxide breakdown, and electrical over-stress.

Thus scaling technique affects performance parameters also.