Put Yes or No for each entry of the table of data dependenci

Put Yes or No for each entry of the table of data dependencies between instructions below in a 5-stage pipeline. The meaning of instructions are shown inline below| l1: LD R1, MEM(324)/* Load content of MEM(324) into Register R1 */l2: ADD R1, R1, R2/* Add R1 to R2 and store result in R1 */l3: SUB R2, R2, R4/* Subtract R4 from R2 and store result in R2 */l4: MUL R3, R3, R2/*Multiply R3 and R2 and store result in R3 */l5: ST MEM(324), R1/* Store contents of R1 into MEM(324) */

Solution

RAW

WAR

WAW

l1->l2

yes

no

yes

l1->l3

no

no

no

l2->l3

no

yes

no

l2->l5

yes

no

no

l1->l5

no

no

no

A pipeline hazard is a situation where a correct program stops to work correctly due to implementing the processor with a pipeline.

RAW Hazard

It is a hazard where later instruction tries to read an operand before earlier instruction writes it

WAR Hazard

It is a hazard where later instruction tries to write an operand before earlier instruction reads it

WAW Hazard

It is a hazard where later instruction tries to write an operand before earlier instruction writes it

	RAW	WAR	WAW
l1->l2	yes	no	yes
l1->l3	no	no	no
l2->l3	no	yes	no
l2->l5	yes	no	no
l1->l5	no	no	no