Write the VHDL code for a 41 multiplexor where each input to

Write the VHDL code for a 4:1 multiplexor where each input to the multiplexor is a 16-bit unsigned integer.

Solution

A(input)

B(Input)

A(input)	B(Input)	C(Input)	D(Input)	X(Outpu)
0	0	0	0	0
0	0	0	1	0
0	0	1	0	0
0	0	1	1	0
0	1	0	0	0
0	1	0	1	1
0	1	1	1	1
1	0	0	0	0
1	0	0	1	0
1	1	0	0	0
1	1	1	0	0
1	1	1	1	1