Electrical Engineering help Programming language is Verilog

Electrical Engineering help? Programming language is Verilog.

Using your corrected block diagram of the 4-bits ALU from the precious lab submission, create a top-level module with the following interface: module four_bits _alu (output wire [3:0] Result, //4-bit output output wire Overflow, //-bit signal for overflow input wire [3:0] opA, opB, //4-bit operands/* ctrl | operation* * 00 | AND * * 01 | ADD * * 10 | AND * * 11 | SUB */input wire [1:0] ctrl//2-bit operation select);

Solution

module four_bit_alu(input[3:0]a,[3:0]b,[2:0]s,output[3:0]y);

always@(a(or)b(or)s)

case(s)

00:y=a^b;

01:y=a+b;

10:y=a^b;

11:y=a-b;

default:y=4\'zzzz;

endcase

end

endmodule