Tough Computer Systems question Show work for partial credit

Tough Computer Systems question.

Show work for partial credit.

Assume a CPU has the following instruction format: opcode num operands [model operand 1] [mode2 operand2] Instructions will have 1 or 2 operands, each of which will have its own mode specifier and the instruction will include a bit to indicate 1 operand or 2. The CPU\'s instruction set has 191 operations (op codes) and there are 7 different addressing modes available. Assume a fixed length 32-bit instruction. Answer the following and offer a brief explanation for each answer. One type of instruction will use two registers for the operands. I low\' many registers at most should we provide? Assuming we have 64 registers, if an instruction has a register and an immediate datum as its two operands, how large can the immediate datum be assuming it is represented in 2\'s complement? One mode is base displacement which specifies both a register and an offset. Assume that if this mode is used for one operand, the other operand must be a register. If this machine has 32 registers, what is the largest displacement possible? Assume displacements are in unsigned magnitude. One mode is a direct memory address. Assume this mode can only be used if there are no other operands. What is the largest memory address that can be referenced?

Solution

Answer

a.

two registers for operands and one more register to hold data after operation, so in total 3 registers.

b.

the immediate datum can be a word size large, i.e. 32 bits at max.

c.

the maximum displacement can be 0xFFFF

d.

the largest memory address that can be referenced to will be as per the following

32 - 6 bits (6 bits for op code) = 26 bits

so,

(11 1111 1111 1111 1111 1111 1111)2 = (0x3FFFFFF)16 is the largest memory address that can be referenced.

Tough Computer Systems question. Show work for partial credit. Assume a CPU has the following instruction format: opcode num operands [model operand 1] [mode2 o

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