We wish to dispaly the hexadecimal value of an 8 bit number

We wish to dispaly the hexadecimal value of an 8 bit number A on the two 7 segment dispalys HEX3-2. We also wish to dispaly the hex value of an 8 bit number B on the two 7 segment dispalys HEX1-0. The values of A and B are inputs to the circuit which are provide by means of switches SW7-0. To input the value of A and B, first set the switches to the desired value of A, store these switch values in a register, and then change the swithces to the desired value of B. Finally, use an adder to generate the arithmetics sum S=A+B, and display this sum on the 7 segment dispalys HEX5-4. Show the carry out produced by the adder on LEDR[0]. 1. Create a new quartus II project which will be used to implement the desired circuit on your DE series board. 2.Write a Verilog file that provides the necessary functionality. Use KEY0 as an active low asynchronouse reset, and use KEY1 as a clock input. 3. Include the necessary pin assignments for the pushbutton switches and 7 segment displays, and then complile the circuit. 4.Download the circuit ontoyour DE series board and test its functionality. please help HDL code

Solution

program

#include <avr/io.h>
#include <util/delay.h>
#define PORT_7_SEGMENT PORTB
#define DDR_7_SEGMENT DDRB
void SevenSegment(uint8_t count,uint8_t dp, uint8_t dec_hex)
{
if(count <dec_hex)
{
switch (count)
{
case 0:
PORT_7_SEGMENT=0b10001000;
break;
case 1:
PORT_7_SEGMENT=0b10111110;
break;
case 2:
PORT_7_SEGMENT=0b00011001;
break;
case 3:
PORT_7_SEGMENT=0b00011100;
break;
case 4:
PORT_7_SEGMENT=0b00101110;
break;
case 5:
PORT_7_SEGMENT=0b01001100;
break;
case 6:
PORT_7_SEGMENT=0b01001000;
break;
case 7:
PORT_7_SEGMENT=0b10111100;
break;
case 8:
PORT_7_SEGMENT=0b00001000;
break;
case 9:
PORT_7_SEGMENT=0b00001100;
break;
case 10:
PORT_7_SEGMENT=0b00101000; //A
break;
case 11:
PORT_7_SEGMENT=0b01001010; //b
break;
case 12:
PORT_7_SEGMENT=0b11001001; //C
break;
case 13:
PORT_7_SEGMENT=0b00011010; //d
break;
case 14:
PORT_7_SEGMENT=0b01001001; //E
break;
case 15:
PORT_7_SEGMENT=0b01101001; //F
break;
}
if(dp)
{
PORT_7_SEGMENT&=0b11110111;
}
}
else
{
PORT_7_SEGMENT=0b11011111;
}
}
int main()
{
DDR_7_SEGMENT=0xFF;
PORT_7_SEGMENT=0xFF;   
uint8_t count=0;
uint8_t dec_hex=16;
while(1)
{
SevenSegment(count,0, dec_hex);
count++;
if(count==dec_hex)
{
count=0;
}
_delay_ms(1000);
}
}