1What is the addressing mode for BCF PORTB3a 2What is the pu

1.What is the addressing mode for: BCF PORTB,3,a 2.What is the purpose of: lsfr 1,0x3FA 3.What registers are saved (if any) on the FAST register stack when and interrupt occurs? 4.How many bits are there in the BSR? 5.What is the vector address for the high-priority interrupts? 6.What is the purpose of the ORG directive? 7.In addition to setting the enable bit for an interrupt, what else must be done?

Solution

1) Adressing mode for BCF PORT,B, 3, A

The number 3 in the instruction is specified to get cleared.

i.e from the register of data \"PORTB\" the bit 3 is cleared up. then the pin RB3 will be pulled to set to low.

2) LFSR 1, 0X3FA

LFSR: It stands for \"Linear Feedback Shift Register\"

This is used to generate periodic sequences in circuits.

- That\'s compulsion to start with a nonzero, with maximum allowable length of 2n - 1, and the above 0X3FA is clearly below that.

3) Registers saved when FAST register stack when and interrupt occurs

Three registers namely, STATUS WREG BSR will be seen to save first when an interrupt occurs.

These aren\'t directly accessble to the programmer.

4) BSR (Bit Scan Register)

Being on the 3.registers which gets saved during the time of interrupt. It has to work with as low memory as possible. BSR register is a single memory location register, generally has only one bit. It is either set to 0 or 1 dependng on the result of Bit scan process the instruction has done.

5) High Interrupts

When a high interrupt occurs they are directed toward, address 0008 (Vector table)