Use verilog to create a sevensegment counter The counter wil

Use verilog to create a seven-segment counter. The counter will count from 0 to F,and it will repeat infinity times.

Solution

module seven_segment_count(clk,clear,Q);
  

output reg [3:0] Q;
reg [3:0] dout ;
input clk ;
wire clk ;
input clear ;
wire clear ;

initial dout = 0 ;

always @ (posedge (clk))
begin
if (clear)begin
dout <= 0;
end
else if (dout<4\'hF) begin
dout <= dout + 1;
end
else if (dout==4\'hF) begin
dout <= 0;
end

Q=dout;
end
endmodule;

Use verilog to create a seven-segment counter. The counter will count from 0 to F,and it will repeat infinity times.Solutionmodule seven_segment_count(clk,clear

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