Question 4 1 pts Consider the following characteristics of a
Question 4 1 pts Consider the following characteristics of a cache memory system: Addresses are 32-bits. · The memory is byte addressable The CPU accesses 4-byte words. Blocks have 64 bytes. The cache is 8-way set associative with 1024 sets. Which one of the following shows the address breakdown for an efficient cache implementation having the characteristics above? bit 31 24 16 8 0 b bits t bits s bits bit 31 24 16 8 0 v bit t bits s bits b bits
Solution
Observe the options :
Effective cache implementation of Tag Set and WORD for the given information is Option4.
