The ALU Data Output is provided by AC or LSC as dictated by

The ALU Data Output is provided by AC or LSC as dictated by the control signal S3. The block diagram of Fig. 7 employs 2-to-1 multiplexers to select AC or LSC to be loaded into register C. Your final circuit of the ALU data flow should have 3 control inputs (S2 - S0), 8 data inputs (A3 - A0 and B3 - B0), 4 data outputs (C3 - C0) and the most significant carry bits, which will be used for the status circuit. The ALU results are characterized by four status bits (C, S, Z, and V), which are defined as follows: Bit Cy (carry) is set to 1 only when the operation is an arithmetic operation and its carry output is 1. It is cleared to 0 if the carry is 0. Bit S (sign) is set to 1 if the most significant bit of the result C3 is one.. Bit Z (zero) is set to 1 only if the output of the ALU contains all 0\'s. It is set to 0 otherwise. Bit V (overflow) is set to 1 only when an overflow occurs when performing operations on signed numbers in 2\'s complement representation (exclusive-OR of the 2 most significant carries). Derive the logic equations of the status bits and implement them with conventional gates.

Solution

Let choose most signifiacnt Carry Bit is C

For caary Flag:

Cy=C AND 1;

For Sign Flag

S=C3 AND 1

For Zero falg:

Z=NOT((C3 OR 0) OR (C2 OR 0) OR (C1 OR 0) OR (C0 OR 0))

For Overflow:

C3 XOR C2