C If the power supply voltage for this CMOS gate were reduce

(C) If the power supply voltage for this CMOS gate were reduced from 1 V to 0.9 V, we would expect the dynamic power dissipation of the gate to be approximately

81% of its previous value

90% of its previous value

the same as its previous value

111% of its previous value

123% of its previous value

none of the above

Solution

ANSWER:- 90% of its previous value.

EXPLANATION :- As dynamic power dissipation is directly proportional to Voltage, the reduction in voltage leads to reduction in power.

(C) If the power supply voltage for this CMOS gate were reduced from 1 V to 0.9 V, we would expect the dynamic power dissipation of the gate to be approximately

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