A digital computer performs its tasks by first entering a fe
     A digital computer performs its tasks by first entering a \"fetch cycle\" to obtain a machine instruction from memory and then going through an \"execution cycle\" to perform operations by the instruction. When the instruction is completely executed the machine go into a fetch eyele again and the process is repeated. Each machine instraction contains a field known as \"op-code\". After an instruction is fetched from memory into the processing unit, the op code is stored in a register called the Instruction Register (IR). This op-code stays in the IR until it is replaced by an op-code from another fetch operation. The HU-356 computer takes one clock period for the fetch operation but may take from one to three clock periods for execution depending on whether the instruction is ingroup 1,2, or 3. The first group of instructions takes only one clock period to execute while the second group takes two clock periods and the third, three. In this machine, the last two bits of an op-code (IRI and IRO) actually indicate the group to which the instruction Note that both combinations (0 1) and (1 1) represent group 2 instructions. In other words. if IRO is 1, it is a group 2 instruction regardless of IR. IfIRO is 0, then IR1 determines whether the instruction belongs to group 1 or group 3 If we let F represent the fetch cycle, SI represent the first clock period of an execution cycle, S2 represent the second clock period of an execution cycle, and S3 represcnt the third clock period of an execution cycle, then we may rephrase the problem as the followingeither0 orl.i.e, don\'t care): r(IRI IR0)=(00),the sequence is F,S1, F, If (IR1 IRO) C I), the sequence is F,S1, S2,F, (R1 IR0)(1 0), the sequence is F, S1, S2, S3, F, The problem, tierefore, is one of a sequencer design. The sequence, however, varies depending on the inputs,IR1 ad RO. F, SI, S2, and S3 are the \"states\" of the sequencer where F alone represents the fetch cycle and S1, S2 and S3 are all parts of the execution eyele. You can assume that IR1 und IRO will only be changed in the state F(i.e., when a new instruction is loaded into the R). Construct a state diagram showing the desined state transitions. The states are F, S1, S2, and S3. The inputs are IR1 and IR0. Do not worry about the outputs at this time. Convert the state diagram into a state table. Assign a unique two-bit code for each state and obtain a state transition table with encoded states.     
 
  
  Solution
State Diagram:
State table:
Here X indicate dont care function
State transition table:
Assign F=00,S1=01,S=10,S3=11
| Present State | NextState | 
| F | S1 | 
| F | S1 | 
| F | S1 | 
| F | S1 | 
| S1 | F | 
| S1 | S2 | 
| S1 | S2 | 
| S1 | S2 | 
| S2 | X | 
| S2 | F | 
| S2 | S3 | 
| S2 | F | 
| S3 | X | 
| S3 | X | 
| S3 | F | 
| S3 | X | 

