Unless otherwise specified assume the following technology p

Unless otherwise specified, assume the following technology parameters (You may want to write these down on your blank pages) kn, = 1 mA/V2 kp\' = 0.5 mAN2 2Pr = 0.6V Lmin = 0.5 m Vtol = 1 V for both n and p channels

Solution

Now the delay will be S times becauses the internal capacitace is directly proportional to the width of transistor.