Problem 2 Shown below is diagram of 16 Mbit RAM part that is

Problem #2

Shown below is diagram of 16 Mbit RAM part that is similar to the static RAM device we discussed in lecture. Also shown is a simplified schematic diagram for a certain microprocessor. The signals marked \"DC\" are \"don\'t care signals and are omitted for simplicity. We\'ll just concern ourselves with the signals we need to solve this problem.

a- How many total chips are needed to completely fill the address space of the computer?

b- How many pages of memory are there in this system?

c- Design a decoder circuit that could be used to decode a memory system for this processor with memory at page 0, page 1, page 2 and the last page of memory.

Problem #3

Assume that the memory chip in problem #2 has a 15 nanosecond access time. This means the time interval that occurs from the time that the ~CE input goes low until the time that data is available to read or that the chip can accept new data to be written. Now assume that the decoder circuit you designed in problem #2 has a total propagation delay of 6 nanoseconds. What is the maximum clock frequency that processor could run at without needing any additional wait states? You may assume that the processor requires three full clock cycles to do a read or a write operation.

Solution

question is not clear