The timing parameters of the components used in the followin

The timing parameters of the components used in the following questions are given as follows. Answer questions based on these data. In your answer, you have to identify the path and write down the formula used in your calculation. You CANNOT just write a number as your solution. Calculate the minimum clock period Calculate the clock to output delay Adding buffers to the circuit to make it achieving clock frequency of 1GHz. You can use as many buffers as you want. You circuit should not have timing violations.

Solution

From the diagram, [t2!-t1: can be set as the minimum amount of time Input that must be there and should be constant befre the clock starts. Extra constant time can be termed as the margin for setup

The Formula for calculating the minimum clock out to delay through a formula
<=shortest to source register delay + micro clock to display delay + shortest register to pin delay

The buffer contribution of the clock is refererred as phase jitter.The source is measured first, then source plus. Reference clock must have lower phase noise than Dut to characterise the buffer in the right way.