DDR3 SDRAM can read or write a word of memory with a latency

DDR3 SDRAM can read or write a word of memory with a latency of about 10 nanoseconds. Suppose that when an interrupt occurs, the program counter, PSW, and an additional 30 CPU registers are pushed onto the stack. What is the maximum number of interruprts per second that this machine can process? (Assume each interrupt is handled but does no actual work)

Solution

Total I/O operations after interrupt has occured = 30(regiters) + 1 (PC) + 1 (PSW) = 32 operations

Total time taken by all operations = 32 * 10 = 320 nanoseconds = 320*10^-9 seconds

Total number of interrupts handled in a second = 1 / (320*10^-9) = 3.125 * 10^6