a Convert the following instructions from machine language i

a. Convert the following instructions from machine language into MIPS assembly language. 1. 0x02129821 2. 0x22700003 b. After the two instructions have been executed, (1) first then (2), what are the values in the four registers?

Register Register Register SSO sS1 SS2 SS3 number ame con 16 17 18 19 0x28 OXA 0x16 0x99

Solution

A)The instruction set architecture (ISA) is a protocol that defines how a computing machine appears to a machine language programmer or compiler. The ISA describes the (1) memory model, (2) instruction format, types and modes, and (3) operand registers, types, and data addressing. Instruction types include arithmetic, logical, data transfer, and flow control. Instruction modes include kernel and user instructions.

ISAs are specified in formal definition documents, for example, for the V9 SPARC machine and Java Virtual Machine.

The implementation of the ISA in hardware is couched in terms of the fetch-decode-execute cycle illustrated in Figure 2.2. In the fetch step, operands are retrieved from memory. The decode step puts the operands into a format that the ALU can manipulate. The execute cycle performs the selected operation within the ALU. Control facilitates orderly routing of data, including I/O to the ALU\'s external environment (e.g., peripheral devices such as disk or keyboard).

Machne language instructions are of four types: Arithmetic, Logical, Data transfer, and Branches (also called flow control), as follows:

The MIPS instruction format uses the KISS principle (keep it simple and stupid). As we say more formally:

Memory contains instructions and data specific to a given program. Instructions are fetched automatically by control, while data is transferred explicitly between the memory and processor. Figure 2.4 shows an example of memory operations in MIPS using the lw (load word) and sw (store word) instructions.

Here, data is organized in linear memory as a stream of bits. Each byte is comprised of eight contiguous bits, and each word is comprised of four contiguous bytes.

Data stored in memory is referenced using an address, which is an identifier that points to a byte in memory. Addresses in MIPS range from 0 (which points to data in the part of memory denoted as M[0]) up to 4,294,967,292 (referenced data is written as M[2³²]). Thus, all addresses are 32 bits long, so 2³⁰ 32-bit (four-byte) words are stored in MIPS memory.

Only load/store instructions can access data in memory. Since each word has length 4 bytes, the addresses referenced by these instructions must be aligned, that is, all 32-bit words start at addresses 0, 4, ..., 4n. Because of differences between computer manufacturers and the way different machines address memory, the MIPS address formats have two types of encoding: big endian and little endian, as shown in Figure 2.5. Here, a decimal (base-10) address of 3,101 is broken down into a hexadecimal (base-16) address of (00 00 0c 1d)₁₆. Big endian stores the big part (00) at the top or beginning of the address, and little endian is the reverse of big endian (stores (1d) at the beginning of the address).

There are other interesting things you can do with memory addressing, such as offsets. For example, suppose you wanted to add a number in memory location A[2] and put the result in A[0]. We know that A[2] has the larger address, and this can be loaded using an offset of 8, as shown in Figure 2.6. Here, the register $s1 represents the base address, and the contents of the variable h are stored in register $s2.