Please answer a b c d e f g h Analyze the clocked synchronou

Please answer a, b, c, d, e, f, g, h

Analyze the clocked synchronous state machine show below. Assume that unconnected or unshown inputs are wire appropriate to allow normal functionality. [For example, the clock is not shown (for clarity), but should be assumed to be present.] Simplify all equations Input Equations D1 = D0 = Output Equation Z = Circle One Z is Mealy or Z is Moore The design is implemented with LS devices having the following characteristics: Comb, gates propagation delay, input to output (min): 1 ns input to output (max): 2 ns DFF propagation delay, clock to output (min): 4 ns clock to output (max): 6 ns input to output (min, max): DFF setup time, data input before clock: 5 ns DFF hold time. data input after clock: 3 ns Calculate die timing parameters for the design. Prop. delay, clock to output (min): Prop. delay, input to output (max): Setup time, data input before clock: Hold time, data input after clock: Maximum clock rate:

Solution

a) Input equation:

D1=X.Q0

D0=x

b)

Z=Q1\'.Q0

c)Moore machine

Since the output depends upon only memory unit .

d)

4+1=5ns

e)proagation delay:

5ns