Write a sequence of exactly two MIPS instructions to load th
Solution
0:$zero
 3:($v0-$v1)
 2:($v0-$v1)
 6:($v0-$v1)
 3:($v0-$v1)
 8:($t0-$t7)
 2:($v0-$v1)
 7:(a1-$a3)
There are many different ways, for example:
 1. add $zero, $zero, $zero}
 2. sll $zero, $zero, $zero}
 3. or $zero, $zero, $zero
 li $s0, # Load 32-bit immediate value into s0
 This instruction can be implemented a couple of different ways:
 lui $s0, ori $s0, $s0,
 or lui $s0, addi $s0, $s0,
 div $s0, $s1, $s2
 # Integer division: s0 = s1/s2 This instruction can be implemented simply using the div instruction.
 div $s1, $s2
 mflo $s0
 Registers:
 Smaller instruction encoding may mean smaller programs -- this may be difficult in practice
 since the reductions aren’t byte-aligned, so addressing subsequent instructions is difficult.
 It also breaks the MIPS tenet of fixed-length instructions. Programs may increase in size
 because fewer registers means more data will ’spill’ into memory, leading to more load instructions.

