Homework SourseWe are considering adding a new instruction to the MIPS ISA
We are considering adding a new instruction to the MIPS ISA: lwi rt, rd(rs). This means load word indirect, where rt <-- Mem[rd + rs]
a) Which existing blocks of the MIPS data path can be used to implement this new instruction?
b) What new functional blocks are needed to execute it?
c) What new signals from the Control Unit must be created to allow the execution of this instruction?
d) How long would it take in a single cycle implementation? In a multicycle implementation?
Solution
lwi rt, rd(rs)
this instruction loads word obtained by adding adress in register rd and rs to rt.
a)
b) No new functional blocks are needed to execute
c)no signal need to be created.
d)
Both take same time
-fetch instruction to instruction memory
-read rs value to ALU
-read offset in rd
-extend 16 bit offset to 32 bit value
-add the address in ALU
-fetch the data from calculated memory
-write the data to rt
| action | MIPS block |
|---|---|
| store the address of current instruction | Program Counter |
| fetch instruction | instruction memory |
| Access/writ data, instruction and address from register | Registers |
| extend 16 bit offset(rd) to 32 bit value | Sign extender |
| Add the address in rd and rt | ALU |
| to read data from address calculated from previous step | Data Memory |
![We are considering adding a new instruction to the MIPS ISA: lwi rt, rd(rs). This means load word indirect, where rt <-- Mem[rd + rs] a) Which existing block](/WebImages/37/we-are-considering-adding-a-new-instruction-to-the-mips-isa-1111002-1761589079-0.webp "We are considering adding a new instruction to the MIPS ISA: lwi rt, rd(rs). This means load word indirect, where rt <-- Mem[rd + rs] a) Which existing block")
