Computer Architecture Memory and Cache If you already answer

Computer Architecture: Memory and Cache If you already answer these questions, please skip and let someone else helps. Thanks,

(Q4) A 32kB cache has a block size of 16 bytes and is 4-way set-associative. How many bits of a 32-bit address will be in the Tag, Index, and Bock Offset?

(a) Tag: 13; Index: 13; Offset: 6

(b) Tag: 19; Index: 9; Offset: 4

(c) Tag: 10; Index: 12; Offset: 10

(d) Tag: 20; Index: 9; Offset: 3

Solution

1) cache blocks 32KB/16 = 2048

2) If it\'s 4-way set associative, this implies 2048/4=512 sets

( hence 2^9 = 512 different indices)

3)There are 16=2^4 possible offsets

Here CPU address is 32 bit so 32=19+9+4

So Tag: 19; Index: 9; Offset: 4

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