ARM Instructions Arithmetic An 32bit ARM processor performs

(ARM Instructions & Arithmetic)

An 32-bit ARM processor performs binary arithmetic on signed half-word (i.e. 16-bit) operands using the 2’s complement scheme (i.e. with the leftmost bit as sign-bit). In each of the following cases: 1 – 4, clearly show the detailed steps of computation and specify whether an overflow occurs or not in the computed result. For a clear illustration, below is an example of the expected answer for the subsequent cases.     

     e.g. +7 – 6 = +7 + (-6)

      0000 0000 0000 0111   (+7)

+    1111 1111 1111 1010   (-6)

______________________________

          (1) 0000 0000 0000 0001 (+1)     - no overflow.   

1. -123 + 87

2. -13 - 32756

3. 15383 + 17388

4. 1189 - 31761

Solution

3.

(15383)10 --> ( 0011110000010111)2

(17388)10 = (0100001111101100)2

total 100000 000000 00 1 1

total= 1111111011

(ARM Instructions & Arithmetic) An 32-bit ARM processor performs binary arithmetic on signed half-word (i.e. 16-bit) operands using the 2’s complement schem

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