1 WHATS THE MAXIMUM TIME POSSIBLE BEFORE THE FREERUNNING COU

1) WHAT\'S THE MAXIMUM TIME POSSIBLE BEFORE THE FREE-RUNNING COUNTER OVERFLOWS WHEN THE E-CLOCK IS 8MHZ?

2) THE FREE-RUNNING COUNTER IS USING AN INPUT CLOCK OF 8MHZ. IF AN EVENT IS CAPTURED AT A READING OF $72AC, WHAT\'LL THE COUNTER VALUE IF THE NEXT EVENT OCCURS AFTER 1mS.

3) IF BIT\'S PR [ 2;1;0 ] IN THE TSCR2 REGISTER FOR THE HCS12 EMBEDDED TIMER ARE SET TO 010 AND THE BUS CLOCK FEQUENCY IS 2MHZ, WHAT\'S THE MAXIMUM TIME THAT THE COUNTER REQUIRES TO OVERFLOW:?

4) FOR A 2mSEC PERIODIC PULSE WAVEFORM AND AN E-CLOCK OF 0.5uSEC, CALCULATE. HOW MANY E-CLOCK CYCLES CO. THE RESPOND TO THE 2mSEC (ie FREE-RUNNING COUNTER CLOCKS)

5) WHAT\'S THE PULSE WIDTH IF THE SOFTWARE READS A VALUE OF D15C AS THE DIFFERENCE BETWEEN THE RISING EDGE AND THE FALLING EDGE OF THE PULSE. THE HC12 E-CLOCK IS 24MHZ AND A PRESCALE FACTOR OF 8 IS USED.

Solution

The MC9S12 has a 16-bit counter that normally runs with an 24 MHz clock. •

timer subsystem can be found in the ECT 16B8C Block User Guide.

ECT stands for Enhanced Capture Timer.

• When you reset the MC9S12, the clock to the timer subsystem is initially turned off to save power. – To turn on the clock you need to write a 1 to Bit 7 of register TSCR1 (Timer System Control Register 1) at address 0x0046.

• The clock starts at 0x0000, counts up (0x0001, 0x0002, etc.) until it gets to 0xFFFF. It rolls over from 0xFFFF to 0x0000, and continues counting forever (until you turn the counter off or reset the MC9S12).

• It takes 2.7307 ms (65,536 counts/24,000,000 counts/sec) for the counter to count from 0x0000 to 0xFFFF and roll over to 0x0000.

• To determine the time an event happens, you can read the value of the clock (by reading the 16-bit TCNT (Timer Count Register) at address 0x0044.

You can slow down the clock by dividing the 24 MHz clock by 2, 4, 8, 16, 32, 64 or 128. • You do this by writing to the prescaler bits (PR2:0) of the Timer System Control Register 2 (TSCR2) Register at address 0x004D.

slow down the clock: 2.7307 ms will be too short if you want to see lights flash. PR2:0 Divide Freq Overflow Rate 000 1 24 MHz 2.7307 ms 001 2 12 MHz 5.4613 ms 010 4 6 MHz 10.9227 ms 011 8 3 MHz 21.8453 ms 100 16 1.5 MHz 43.6907 ms 101 32 0.75 MHz 87.3813 ms You can slow down clock by dividing it before you send it to 110 64 0.375 MHz 174.7627 ms 111 128 0.1875 MHz 349.5253 ms the 16bit counter. By setting prescaler bits PR2,PR1,PR0 of TSCR2 you can bset TSCR1,#$80 staa TSCR2 TSCR1 = TSCR1 | 0x80;

To set up timer so it will overflow every 87.3813 ms: ldaa #$05 TSCR2 = 0x05; VCC 16Bit Counter TIM