The addersubtractor circuit of Fig 413 has the following val

The adder-subtractor circuit of Fig 4.13 has the following values for made input M and data inputs A and B. In each case, determine the values of the four SUM outputs, the carry C, and overflow V.

Solution

Mode M = 0 implies Addition Operation and Mode M = 1 implies subtraction operation i.e. ( Addition of A and 2\'s complement of B)

2\'s complement of B is obtained by inverting all the bits in B and adding 1 to inverted answer.

If and only if M = 1, 2\'s complement of B is needed.

M	A	B	2\'s Complement of B	A + B	A + 2\'s Complement of B	Output Carry	Overflow
1	0001	0000	0000		0001	0	0
1	1100	1000	1000		0100	1	0
0	0111	0110		1101		0	0
0	1000	1001		0001		1	1
1	1010	0101	1011		0101	1	0