We wish to add support for BNE instruction by adding a contr

We wish to add support for BNE instruction by adding a control signal \"Bnec\" in the main control unit that can be used for setting up the program counter value. We will like to modify the main control as follows: Show the logic circuit that will generate the control signal Bnec.

Solution

// mips_decode: a decoder for MIPS arithmetic instructions
//
// alu_op (output) - control signal to be sent to the ALU
// writeenable (output) - should a new value be captured by the register file
// rd_src (output) - should the destination register be rd (0) or rt (1)
// alu_src2 (output) - should the 2nd ALU source be a register (0) or an immediate (1)
// except (output) - set to 1 when we don\'t recognize an opdcode & funct combination
// control_type (output) - 00 = fallthrough, 01 = branch_target, 10 = jump_target, 11 = jump_register
// mem_read (output) - the register value written is coming from the memory
// word_we (output) - we\'re writing a word\'s worth of data
// byte_we (output) - we\'re only writing a byte\'s worth of data
// byte_load (output) - we\'re doing a byte load
// lui (output) - the instruction is a lui
// slt (output) - the instruction is an slt
// addm (output) - the instruction is an addm
// opcode (input) - the opcode field from the instruction
// funct (input) - the function field from the instruction
// zero (input) - from the ALU
//

module mips_decode(alu_op, writeenable, rd_src, alu_src2, except, control_type,
mem_read, word_we, byte_we, byte_load, lui, slt, addm,
opcode, funct, zero);
output [2:0] alu_op;
output writeenable, rd_src, alu_src2, except;
output [1:0] control_type;
output mem_read, word_we, byte_we, byte_load, lui, slt, addm;
input [5:0] opcode, funct;
input zero;

wire comm_add, comm_sub, comm_and, comm_or, comm_nor, comm_xor, comm_addi, comm_ori, comm_xori;
wire comm_bne, comm_beq, comm_j, comm_jr, comm_lui, comm_slt, comm_lw, comm_lbu, comm_sw, comm_sb, comm_addm;
wire first, second, third;

//main
assign comm_add = opcode == funct == (`OP0_ADD && `OP_OTHER0);
assign comm_sub = opcode == funct == (`OP0_SUB && `OP_OTHER0);
assign comm_and = opcode == funct == (`OP0_AND && `OP_OTHER0);
assign comm_or = opcode == funct == (`OP0_OR && `OP_OTHER0);
assign comm_nor = opcode == funct == (`OP0_NOR && `OP_OTHER0);
assign comm_xor = opcode == funct == (`OP0_XOR && `OP_OTHER0);

//immediates
assign comm_addi = opcode == `OP_ADDI;
assign comm_andi = opcode == `OP_ANDI;
assign comm_ori = opcode == `OP_ORI;
assign comm_xori = opcode == `OP_XORI;

assign comm_beq = opcode == `OP_BEQ;
assign comm_bne = opcode == `OP_BNE;
assign comm_j = opcode == `OP_J;

assign comm_jr = opcode == funct == (`OP0_JR && `OP_OTHER0);

assign comm_lui = opcode == `OP_LUI;
assign comm_slt = opcode == funct == (`OP0_SLT && `OP_OTHER0);

assign comm_lw = opcode == `OP_LW;
assign comm_lbu = opcode == `OP_LBU;
assign comm_sw = opcode == `OP_SW;
assign comm_sb = opcode == `OP_SB;

assign comm_addm = opcode == funct == (`OP0_ADDM && `OP_OTHER0);

assign writeenable = comm_add | comm_sub | comm_and | comm_or | comm_nor | comm_xor | comm_addi | comm_andi | comm_ori | comm_xori
| comm_lui | comm_slt | comm_lw | comm_lbu | comm_addm;

assign rd_src = comm_addi | comm_andi | comm_ori | comm_xori | comm_lui | comm_lw | comm_lbu;

assign alu_src2 = comm_addi | comm_andi | comm_ori | comm_xori | comm_lw | comm_lbu | comm_sw | comm_sb;

assign control_type[0] = (comm_beq && zero) | (comm_bne && ~zero) | comm_jr;
assign control_type[1] = comm_jr | comm_j;

assign alu_op[0] = comm_sub | comm_or | comm_xor | comm_ori | comm_xori | comm_beq | comm_bne | comm_slt;

assign alu_op[1] = comm_add | comm_sub | comm_nor | comm_xor | comm_addi | comm_xori | comm_beq | comm_bne | comm_slt
| comm_lw | comm_lbu | comm_sw | comm_sb | comm_addm;

assign alu_op[2] = comm_and | comm_or | comm_nor | comm_andi | comm_ori | comm_xori;

assign mem_read = comm_lw | comm_lbu | comm_addm;

assign lui = comm_lui;
assign slt = comm_slt;

assign addm = comm_addm;

assign word_we = comm_sw;
assign byte_we = comm_sb;
assign byte_load = comm_lbu;

assign except= ~ (comm_add | comm_sub | comm_and | comm_or | comm_nor | comm_xor | comm_addi | comm_andi | comm_ori | comm_xori
| comm_beq | comm_bne | comm_j | comm_jr | comm_lui | comm_slt | comm_lw | comm_lbu | comm_sw | comm_sb | comm_addm);