For the circuit in Figure 9105 determine the maximum frequen

For the circuit in Figure 9-105. determine the maximum frequency of the clock signal for reliable operation if the set-up time for each flip-flop is 2 ns and the propagation delays (t_PLH and t_PHL) from clock to output are 5 ns for each flip-flop.

Solution

The maximum frequency of the clock signal should be approximately 71,5MHz because the propagation delay is 5ns for each flip-flop, plus the set-up time for each flip-flop is 2 ns, then for any input value iT tAKE approximately 14ns reach the exit when an edge at the clock signal so that signal must have a maximum clock frequency of 71,5MHz happen because if this signal changes faster then bE placing values that are not desired and therefore the system work improperly. Recall that f = 1 / T, where f = frequency and T = Period.