Assume that each SRAMs address is connected to ADR151 and th
       Assume that each SRAM\'s address is connected to ADR[15.1] and that its R/W signal is directly connected to the array R/W input. The SRAM\'s chip select input are driven from the array inputs as shown below.  If the array is signaled to perform a read at address 40F5_16, which SRAM device(s) will be enabled?  Select one or more.  ![Assume that each SRAM\'s address is connected to ADR[15.1] and that its R/W signal is directly connected to the array R/W input. The SRAM\'s chip select input   Assume that each SRAM\'s address is connected to ADR[15.1] and that its R/W signal is directly connected to the array R/W input. The SRAM\'s chip select input](/WebImages/3/assume-that-each-srams-address-is-connected-to-adr151-and-th-971813-1761499660-0.webp) 
  
  Solution
C) SRAM 2
![Assume that each SRAM\'s address is connected to ADR[15.1] and that its R/W signal is directly connected to the array R/W input. The SRAM\'s chip select input   Assume that each SRAM\'s address is connected to ADR[15.1] and that its R/W signal is directly connected to the array R/W input. The SRAM\'s chip select input](/WebImages/3/assume-that-each-srams-address-is-connected-to-adr151-and-th-971813-1761499660-0.webp)
