The average CMOS inverter gate count in todays 4G smart phon

The average CMOS inverter gate count in today’s 4G smart phone is several millions, supporting Mb/s data. It has been envisioned that the gate count will exceed the billion marks in the upcoming 5G smart phones, offering Gb/s data. Let us assume that a 5G smart phone comprises 1 Billion gates. If 50% gates are active at a given time and if VDD=5 V, average load capacitance per gate CL= 1 fF (1 fF=10-15F) and the bit rate is 1 G bps, estimate the average dynamic power dissipation. Is the power consumption acceptable to you? If not, what is the concern? Propose possible solutions.

Solution

we Know that P_dyn=C_LV²_DDf

Given that C_L=1fF,V²_DD=5V,f=1Gbps

P_dyn=1*10^-15*(5)^2*(10)^9

=25*10^-6 W

Power consumption is acceptable