For a VDD of 3V 5V 7V sketch the input waveforms required to

For a VDD of 3V, 5V, 7V, sketch the input waveforms required to test the functionality of the CMOS inverter. Determine the VPP and dc offset setting required for function generator. Use square wave.

Could you also post a solution to this problem statement?

Solution

Better use lab view.

LABVIEW SOFTWARE USING FOR THIS PROBLEMS TO IMPLEMENTING CMOS DESIGN U GIVE THE VALUE U WILL GET RESULTS