251 a Write a behavioral Verilog description of the state ma

2.51 (a) Write a behavioral Verilog description of the state machine you designed in Problem 1.13. Assume that state changes occur on the falling edge of the clock pulse. Instead of using if-then-else statements, represent the state table and output table by arrays. Compile and simulate your code using the following test sequence X= 1101 1110 1111 X should change 1/4 clock period after the rising edge of the clock.

Solution

Finite automata could have outputs appreciate every transition. There square measure 2 kinds of finite state machines that generate output

Mealy Machine
Moore Machine
Mealy Machine
A gritty Machine is AN FSM whose output depends on gift|this|the current} state moreover because the present input.

It will be represented by a half-dozen tuple (Q, , O, , X, q0) wherever

Q may be a finite set of states.

may be a finite set of symbols known as the input alphabet.

O may be a finite set of symbols known as the output alphabet.

is that the input transition perform wherever : alphabetic character × alphabetic character

X is that the output transition perform wherever X: alphabetic character O

q0 is that the initial state from wherever any input is processed (q0 Q).
Moore machine is AN FSM whose outputs depend upon solely this state.

A Moore machine will be represented by a half-dozen tuple (Q, , O, , X, q0) wherever

Q may be a finite set of states.

may be a finite set of symbols known as the input alphabet.

O may be a finite set of symbols known as the output alphabet.

is that the input transition perform wherever : alphabetic character × alphabetic character

X is that the output transition perform wherever X: alphabetic character × O

q0 is that the initial state from wherever any input is processed (q0 Q).

The state diagram of a Moore Machine is shown below

Moore Machine State Diagram
Mealy Machine vs. Moore Machine
The following table highlights the points that differentiate a gritty Machine from a Moore Machine.

Mealy Machine   Moore Machine
Output depends each upon gift state and gift input.   Output depends solely upon this state.
Generally, it\'s fewer states than Moore Machine.   Generally, it\'s a lot of states than gritty Machine.
Output changes at the clock edges.   Input amendment will cause amendment in output amendment as before long as logic is finished.
Mealy machines react quicker to inputs.   In Moore machines, a lot of logic is required to decrypt the outputs since it\'s a lot of circuit delays.
Moore Machine to gritty Machine
Algorithm four
Input:   Moore Machine
Output:   Mealy Machine
Step 1   Take a blank gritty Machine transition table format.
Step 2   Copy all the Moore Machine transition states into this table format..
Step 3   Check this states and their corresponding outputs within the Moore Machine state table; if for a state chi output is m, copy it into the output columns of the gritty Machine state table where chi seems within the next state..
Example
Let us contemplate the subsequent Moore machine

Present State   Next State   Output
a=0   a=1
a   d   b   1
b   a   d   0
c   c   c   0
d   b   a   1
Now we tend to apply rule four to convert it to gritty Machine.

Step 1 & 2
Present State   Next State
a=0   a=1
State   Output   State   Output
a   d       b  
B   a       d  
c   c       c  
d   b       a  
Step 3
Present State   Next State
a=0   a=1
State   Output   State   Output
a   d   1   b   0
b   a   1   d   1
c   c   0   c   0
d   b   0   a   1
Mealy Machine to Moore Machine
Algorithm five
Input:   Mealy Machine
Output:   Moore Machine
Step 1   Calculate the amount of various outputs for every state (Qi) that square measure out there within the state table of the gritty machine.
Step 2   If all the outputs of chi square measure same, copy state chi. If it\'s n distinct outputs, break chi into n states as Qin wherever n = zero, 1, 2.......
Step 3   If the output of the initial state is one, insert a replacement initial state at the start which provides zero output.
Example
Let us contemplate the subsequent gritty Machine

Present State   Next State
a=0   a=1
Next State   Output   Next State   Output
a   d   0   b   1
b   a   1   d   0
c   c   1   c   0
d   b   0   a   1
Here, states ‘a’ and ‘d’ offer only one and zero outputs severally, therefore we tend to retain states ‘a’ and ‘d’. however states ‘b’ and ‘c’ turn out completely different outputs (1 and 0). So, we tend to divide b into b0, b1 and c into c0, c1.

Present State   Next State   Output
a=0   a=1
a   d   b1   1
b0   a   d   0
b1   a   d   1
c0   c1   C0   0
c1   c1   C0   1
d   b0   a   0
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 2.51 (a) Write a behavioral Verilog description of the state machine you designed in Problem 1.13. Assume that state changes occur on the falling edge of the c
 2.51 (a) Write a behavioral Verilog description of the state machine you designed in Problem 1.13. Assume that state changes occur on the falling edge of the c
 2.51 (a) Write a behavioral Verilog description of the state machine you designed in Problem 1.13. Assume that state changes occur on the falling edge of the c

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