Prepare a program to add together the numbers 127 decimal Ox

Prepare a program to add together the numbers 127 decimal, Oxe45ad hexadecimal and 2 10101110010 binary (ARM assembly language uses prefix 2_ to indicate a number in base 2). Using a development system, assemble your program, repeatedly correct it and assemble again until there are no errors. Test that the program behaves correctly. What is the total obtained? Using Microvison NXP LPC2129.

Solution

16/32-bit ARM7TDMI-S microcontroller in a little LQFP64 bundle.

16 kB on-chip Static RAM.

128/256 kB on-chip Flash Program Memory. 128-piece wide interface/quickening agent

empowers fast 60 MHz operation.

In-System Programming (ISP) and In-Application Programming (IAP) by means of on-chip

boot-loader programming. Streak programming takes 1 ms for every 512 byte line. Single

division or full chip eradicate takes 400 ms.

EmbeddedICE-RT interface empowers breakpoints and watch focuses. Hinder

benefit schedules can keep on executing while the closer view errand is repaired

with the on-chip RealMonitor\" programming.

Embedded Trace Macrocell empowers non-nosy fast continuous following of

direction execution.

Two interconnected CAN interfaces with cutting edge acknowledgment Þlters.

Four channel 10-bit A/D converter with change time as low as 2.44 µs.

Multiple serial interfaces including two UARTs (16C550), Fast I2C (400 kbits/s)

what\'s more, two SPIs

60 MHz most extreme CPU clock accessible from programmable on-chip

Stage Locked Loop with settling time of 100 µs.

Vectored Interrupt Controller with conþgurable needs and vector addresses.

Two 32-bit clocks (with four catch and four think about channels)

Up to forty-six 5 V tolerant broadly useful I/O pins. Up to nine edge or level

touchy outside intrude on pins accessible.

On-chip precious stone oscillator with a working scope of 1 MHz to 30 MHz.

Two low power modes, Idle and Power-down.

Processor wake-up from Power-down mode by means of outside interfere.

Individual empower/debilitate of fringe capacities for power improvement.

Dual power supply:

CPU working voltage scope of 1.65 V to 1.95 V (1.8 V ±0.15 V).

I/O control supply scope of 3.0 V to 3.6 V (3.3 V ± 10 %) with 5 V tolerant I/O

cushions.