Explain how power savings can be obtained by the use of DETF

Explain how power savings can be obtained by the use of DETFF (Double-edge-triggered flip-flop) as compared to SETFF (Single-edge-triggered flip-flop) useful from a power dissipation standpoint?

Solution

In case of low power and low voltage VLSI circuits, the use and implementation of dual edge triggered flip-flop (DETFF) has gained more advantages. The main advantage of using DETFF is that it allows one to maintain a constant throughput while operating at only half the clock frequency. This makes (DETFFs) to dissipate low power In order to illustrate the advantages in using DETFFs over conventional single-edge triggered flip-flops (SETFFs), a digital half-band FIR filter is designed and implemented.The implementation of the FIR filter with DETFFs exhibits power saving of 38% over the implementation with SETFFs. If the clock load of the DETFF is not significantly larger than the traditional single edge triggered flip-flop (SETFF), the power in the clock distribution network is reduced by as much as a factor of two. Because the clock distribution power is a large fraction of the total power of a synchronous VLSI system, significant overall power savings is possible.