An LDR instruction located at x3200 uses R4 as its base regi

An LDR instruction, located at x3200, uses R4 as its base register. The
value currently in R4 is x4011. What is the largest address that this
instruction can load from? Suppose we redefine the LDR offset to be
zero-extended, rather than sign-extended. Then what would be the largest
address that this instruction could load from? With the new definition,
what would be the smallest address that this instruction could
load from?

Solution

The offset of LDR is 6 bit.

The largest address that the instruction can load with the sign extension is,

x4011 + 2^5 - 1 = x4030

The largest address that the instruction can load with the zero extension is,

    x4011 + 2^6 - 1 = x4050

The smallest address that the instruction can load is x4011 + 0 = x4011