Please help with part 2 and 3 Consider a 3line bus Construct
Please help with part 2 and 3
Consider a 3-line bus. Construct the logical circuit of two 3-bit registers A and B, connected to the bus with their data inputs and outputs. Between the registers there is a combinational logic that loads the value from register A to register B shifted left by one bit - extra credit 5 p. Control signals: Select (TRUE selects A, FALSE selects B), Data In (loads the value from the bus to the selected register), OutputEnable (opens the outputs of the selected register to the bus), Shift (transfers the shifted value of A to B) - (12 points + 5p. extra credit) DRAM stands for __ and uses __ as a memory element. SRAM stands for __ and __ uses__ as a memory element. ROM stands for __Solution
Part 3 Memory:
3.1 DRAM stands for Dynamic Random Access Memory and uses bipolar, MOS, Semiconductor devices as memory element.
3.2 SRAM stands for Static Random Access Memory and uses cache memory consisting of MOS, semiconductor devices as memory element.
3.3 ROM stands for Read-only memory which is a type of non-volatile memory.

