help me write the code for a MOD7 4 bit up counter using sta

help me write the code for a MOD7, 4 bit up counter, using state types.
counter is limited to count from 3 to 9, then repeat itself continuously.

Solution

library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_signed.all; entity counter is port(CLK, CLR : in std_logic; output : inout std_logic_vector(3 downto 0)); end counter; architecture archi of counter is signal tmp: std_logic_vector(3 downto 0); begin process (CLK, CLR) variable i: integer:=0; begin if (CLR=\'1\') then tmp <= \"0011\"; elsif (clk = \'1\') then for i in 0 to 6 loop tmp <= tmp + 1; end loop; end if;