Write the physical address translation of the logical addres
Write the physical address translation of the logical address 0001010010111010 under the following hypothetical memory management scheme: A paging system with a 256- address page size, using a page table in which the frame number happens to be four times smaller than the page number. Explain your answer.
Solution
Answer:
See 256 is page size and 8 bit in LSB is for page offset rest 8 bits are page number now the question is saying 4 times small ,hence right shift that 8 bits by 2 units to divide it by 4, therefore physical transalation of 0001010010111010 will be 0000 101 10111010.
