Write VHDL code that implements a circuit that can multiply

Write VHDL code that implements a circuit that can multiply an eight-bit number A=a7, a6, a5, a4, a3, a2, a1, a0 by either 1, 2, 3, or 4 to produce the result A, 2A, 3A, or 4A, respectively.

Hint: Use a 10-bit adder (you can assume that you have that component so you don\'t have to design it), and multiple 4-to-1 multiplexers. The select lines of the multiplexers should select the multiplication factor. For example s1,s0 = 0,0 specifies multiplication by 1; s1,s0 = 1,1 specifies multiplication by 4. And so on. Hardcode the appropriate lines of the adder and the multiplexers to 0 or 1 as needed. You may also need some additional logic gates.

Solution

--*****************************************************************************************
--
--Description: A top module with module M1 and a module M2
--
--
--******************************************************************************************
LIBRARY IEEE;
USE IEEE.std_logic_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;


ENTITY TOP_M IS
PORT (
sel : IN std_logic_vector(1 downto 0);
A : IN std_logic_vector(7 downto 0);
Y : OUT std_logic_vector(9 downto 0)
);
END TOP_M;

ARCHITECTURE TOP_M_ARCH OF TOP_M IS


signal 3A: std_logic_vector (9 downto 0);

signal 2A: std_logic_vector (9 downto 0);

signal 4A: std_logic_vector (9 downto 0);

component ADDER
port (I0 : in std_logic_vector (9 downto 0);
I1 : in std_logic_vector (9 downto 0);
Z : out std_logic_vector (9 downto 0);
);
end component;


BEGIN

M1_MODULE: M1 port map (A,2A, 3A);

with sel select
Y <=
A when \"00\",
2A when \"01\",
3A when \"10\",
4A when others;

END TOP_M_ARCH;

Write VHDL code that implements a circuit that can multiply an eight-bit number A=a7, a6, a5, a4, a3, a2, a1, a0 by either 1, 2, 3, or 4 to produce the result A

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