A priority encoder is a device that takes a 2nbit input and

A priority encoder is a device that takes a 2^n-bit input and encodes it to produce an n-bit result. If exactly one input bit is set, the output will be the bit position of that input bit. If more than one input bit is set, the encoder will prioritize the set input bits to determine the correct output. The following code is a dataflow model of a 4-to-2 bit priority encoder using conditional signal assignment in which priority is given to the lowest numbered input. Enter this code into the simulator and test it with all possible input combinations. Make sure that your test-bench tests the cases when multiple inputs are set and also the case when none of the inputs are set. Show your test-bench code and the graphical simulation results (cut & paste screenshot of waveform outputs into your homework solution). library IEEE; use IEEE.std_logic_l 164.all; entity pr_cncoder is port(SO, SI, S2, S3: in std_logic; Z:out std_logic_vector (1 downto 0)); end entity pr_cncoder; architecture dataflow of pr_cncoder is begin Z \"00\" after 5 ns when S0=\'1\'else \"01\" after 5 ns when S1 = \'1\' else \"10\" after 5 ns when S2= \'1\' else \"11\" after 5 ns when S3= \'1\' else \"(XT after 5 ns; end architecture dataflow; Rewrite the model using if-then-else statements within a process. Change the priority order to 2, 3, 0, and 1 with 2 being the highest priority input. Re-run the simulation. Show your code and the graphical simulation results. Delete (or comment out) the \"default else clause\" (that covers the case when none of the inputs are set). How does this change the result? Why?

Solution

if(S0 == \'1\')

Z<= \"00\"

else

if(S1 == \'1\')

Z<= \"01\"

else

if(S2 == \'1\')

Z<= \"10\"

else

if(S3 == \'1\')

Z<= \"11\"

else

Z<= \"00\"